Semiconductors and other electronic and opto-electronic assemblies are fabricated in groups on a wafer. Known as “dies”, the individual devices are cut from the wafer and are then bonded to a carrier. The dies must be mechanically mounted and electrically connected to a circuit. For this purpose, many types of packaging have been developed, including “flip-chip”, ball grid array and leaded grid array among other mounting configurations. These configurations typically use a planar printed circuit etched on the substrate with bonding pads and the connections to the die are made by either wire bonding or direct solder connection to the die.
In certain applications, passive components such as resistors and capacitors are required for use in conjunction with the circuits integrated within the die. Depending on the size of and power dissipation within the integrated circuit, and also the integrated circuit fabrication technology, it may not be possible to integrate the passive components within the die. Further, for design of die for use with a variable range of passive components (e.g., passive components that set variable frequency characteristics or current levels) it may not be desirable to integrate the passive components within the die.
Therefore in some applications it is necessary to mount the passive components external to the die, but still desirable to mount the passive components within the integrated circuit package. Presently, in-package mounting is accomplished by integrating surface mount packaged passive components or less frequently leaded passive components on the substrate. However, such mounting of passive components entails not only an added component cost, but the package of the passive component consumes volume and forces the mechanical design to be adjusted to accommodate the physical size and shape of the passive components. The surface mounting of such components also may determine the overall height of the semiconductor package, which is a critical factor in compact electronic designs such as cellular telephones, memory cards and other portable and/or compact electronic devices.
Therefore, it would be desirable to provide a method and substrate having integrated passive components with a low impact on package volume and height. It would further be desirable to provide a method and substrate having reduced manufacturing cost associated with integration of passive components.